GSO IEC 61691-5:2014
IEC 61691-5:2004
Gulf Standard
Current Edition
·
Approved on
25 December 2014
Behavioural languages - Part 5: VITAL ASIC (application specific integrated circuit) modeling specification
GSO IEC 61691-5:2014 Files
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GSO IEC 61691-5:2014 Scope
To provide a standard method of modeling ASICs in VHDL. This method is aimed at providing efficient, accurate, and tool independent simulation suitable for large chip-level designs typical of those which are based on ASICs.
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