This standard defines the following: a) Defines structures in STIL for specifying the DC conditions for a DUT. Examples of the DC condi-tions for device power supplies are DPS setup, power sequencing to the device, and power supply limiting/clamping. Examples of the DC conditions for commonly used signal references are VIL, VIII, VOL, VOH, 10L, IOH, VREF, VCIampLow, and VCIampHi. b) Defines structures in STIL such that the DC conditions may be specified either globally, by pattern burst, by pattern, or by vector. c) Defines structures in STIL to allow specification of alternate DC levels. Examples of commonly used alternate levels are VIHH, VIPP, and VILL. d) Defines structures in STIL such that the DC levels and alternate levels can be selected within a period, much the same as timed format events.